1. Field of the Invention
This invention relates to digital logic arrays of the kind which can be programmed by a user to establish a selected logic circuit configuration, and particularly to a programming circuit capable of establishing the selected circuit configuration with less power consumption, and consequent heat dissipation, than has heretofore been feasible.
2. Description of the Related Art
Many integrated circuits are available in the form of arrays of digital logic elements having various possible interconnections which are programmable by a user so as to establish a logic circuit configuration suited to his particular application. The logic elements may be diodes or transistors, and the interconnections are frequently in the form of fusible links which change from the conductive to the non-conductive state in response to a current of sufficient magnitude. The programming operation should ideally only supply current to the fusible links which are to be opened or "blown". In practice, however, due to the circuit interconnections, supplying the requisite current to such links also results in appreciable current in the other fusible links and their associated logic elements. Consequently, the power source must supply considerably more current than would be adequate for blowing only the selected links. As a result, many of the logic elements, particularly nearest to the power source, may receive, of the order of ten times their normal operating current, resulting in a substantial rise in temperature of the integrated circuit and possible damage to the logic elements therein.
Examples of user programmable digital logic arrays employing fusible links can be found in U.S. Pat. No. 4,422,072, issued Dec. 20, 1983, and U.S. Pat. No. 4,703,206, issued Oct. 27, 1987, both assigned to the present assignee. As noted in the latter patent, an alternative type of programmable connection is a so-called "anti-fuse", which is normally open but closes to create a circuit path when supplied sufficient current. In either case, programming of the array requires that substantial current be supplied to the programmable connections, typically of the order of 50mA for titanium-tungsten fusible links of the type commonly employed. One kind of logic array disclosed in such patent can be configured by programming so as to provide an array of AND/NAND gates and OR/NOR gates. Another type of logic array described therein contains data storage flip-flops which can be configured by programming to maintain a particular logic state.
In such patents the fusible links provide connections to Schottky diodes or bipolar transistors in the array, and since blowing of a fusible link requires substantial current it has been the practice to employ bipolar transistors rather than field-effect transistors (FET's") in the programming circuit. U.S. Pat. No. 4,192,016, issued Mar. 4, 1980, discloses a user programmable logic array wherein the decoder for addressing particular rows of the array includes a bipolar transistor as well as several FET's. However, in order to blow the fusible link of a given transistor in a selected row programming current must be supplied to all transistors in that row. Thus, such array has the problem noted above of requiring excessive programming current.